FPGA fried?

[Altera_Forum]

Hi, 

 I am using a cyclone iii on a custom board I made and I am trying to make sure the fpga section of the board is functional. When I program the fpga, I get the "100% successful" message from Quartus. However, when I test the output pins, they are all stuck at high regardless of my inputs. I was wondering if this means the chip is fried even though the JTAG function is working?  Best,

[Altera_Forum]

If there is no smoke or smell then I would exclude that. try signaltap on few nodes.

[Altera_Forum]

What is the state of your nCE pin?

[Altera_Forum]

I just checked and the nCE is tied to the ground on the board.

[Altera_Forum]

It might be worth checking the state of the nStatus and Config_Done pins after programming. Even though Quartus thinks everything is OK, something may still be amiss.

[Altera_Forum]

Right now, I am trying to use signal tap as kaz mentioned but I get an "Invalid JTAG configuration" message in the Instance Manager. I must add that I do not get any problems messages when I "scan JTAG chain". Is there some problem that the JTAG scanner is not picking up on?

[Altera_Forum]

Thanks gj_leeson.  

 You were right, it was the "Config_done" pin. It was pulled up to 1.2V with a 1Kohm. I changed it to a 10K to 2.5V and now it's working.   You guys were great help.

[Altera_Forum]

Thanks for good information