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Hello,
My design uses the Cyclone 10 FPGA - 10CL040ZU484I8G. During fitter stage I get the error:
Error (169057): Can't place I/O pin <clock input name> at pin location T22 -- I/O pin uses weak pullup, which is not supported by this pin location
Error (169057): Can't place I/O pin <clock input name> at pin location T21 -- I/O pin uses weak pullup, which is not supported by this pin location
Error (169057): Can't place I/O pin <clock input name> at pin location AB12 -- I/O pin uses weak pullup, which is not supported by this pin location
Error (169057): Can't place I/O pin <clock input name> at pin location AB11 -- I/O pin uses weak pullup, which is not supported by this pin location
Error (169057): Can't place I/O pin <clock input name> at pin location T2 -- I/O pin uses weak pullup, which is not supported by this pin location
Error (169057): Can't place I/O pin <clock input name> at pin location G21 -- I/O pin uses weak pullup, which is not supported by this pin location
These are 6 different clock inputs all assigned to clock input pins as seen in the screenshot.
Also have a look at pin settings..
The fitter settings for "Weak pull-up Resistor" is "ON".
Making it "OFF" generates new errors on other pins complaining that pull up is disabled. So, this setting was turned "ON".
Please let me know the reason for this error and how to solve it.
Thank you!
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Hello,
It seems like the pin locations you set do not support weak pull-up resistor. Please refer the guideline from this handbook and change your pin location assignment: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-10/c10lp-51003.pdf
Thank you.
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Hello,
I manually enabled/disabled pull ups for the pins in the pin planner. This was solved. Thank you!
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