Flash Loader IP missing on Cyclone IV GX?

[Adams_Hu]

Hola

Generating a JIC with EPCGX30CF32 to program a serial flash by Convert Programming files.  However Quartus shows no Flash Loader IP after first device programmed.  Could you upload a proper flash loader image for EP4CGX30F32?

Flash Loader IP not loaded on device index1

[FvM]

Hi,
it's not necessarily a defective SFL image. Can be also a JTAG problem or unexpected reconfig happening at the target system.

You didn't report the used Quartus version. I would try to load sfl_enhanced_ep4cgx30cf23.sof and alternatively sfl_ep4cgx30cf23.sof manually and try flash action with disabled sfl programming.

Regards
Frank

[Adams_Hu]

Hi Frank

I could download sof via JTAG into FPGA without any issue.  Try to convert JIC with flash loader by both Quartus standard version 18.1.1 & 23.1.1 and get the same error.

[Adams_Hu]

Hi Frank

No issue to download generic SOF into Cyclone IV GX FPGA.

[Fakhrul]

Hi Adams_Hu,

Any updates? Do you still facing the problem?

Regards,

Fakhrul

[Adams_Hu]

Hi Fakhrul

It is still a problem to download JIC via default Flash Loader IP.  

[BXia]

Try to generate and download .pof instead of .jic

[BXia]

You can refer to the advice in this post: https://community.intel.com/t5/Programmable-Devices/Flash-Loader-IP-not-loaded-on-device-1/m-p/1447330?profile.language=zh-CN

[FvM]

@BXia.pof is no option for a serial flash without dedicated AS programming connection.

I also don't think that the linked previous thread helps here. As far as I undertstand error "Flash Loader IP not loaded" indicates that the expected virtual JTAG node ID isn't actually present in the loaded configuration or can't be identified due to JTAG issues. The linked thread shows that a too high JTAG frequency in case of programmable speed can be a reason.

[Adams_Hu]

Hi Frank

Few questions

1. If USB-Blaster II freuqncy is too high, why 1st SOF can be loaded into Cyclone IV GX FPGA?
2. I ever set USB-Blaster II frequency down to 6MHz but it shows the same fails.  If the JTAG frequency is an issue, how low frequency is suitable for test?

[FvM]

Hi,
SFL IP is involving virtual JTAG logic, can have different frequency limit than loading .sof.

But problems below 12 MHz are hardly expectable.

[Fakhrul]

Hi Adams_Hu,

Any updates? Have you try to use another USB blaster?

Perhaps you may try some advice from this thread: https://community.intel.com/t5/FPGA-SoC-And-CPLD-Boards-And/Flash-Loader-IP-not-loaded-on-device-1/m-p/686493

Regards,

Fakhrul