GPIO IP Does not support LVDS DDIO/DDR DATA arria10 fpga

[AminT_Intel]

Hello,

Can you please elaborate more on your problem so I can assist you better?

Thanks.

[Rk_Athram]

Hi @AminT_Intel ,

I got solution in

https://community.intel.com/t5/FPGA-SoC-And-CPLD-Boards-And/Highspeed-LVDS-ADC-interface-to-arria-10-fpga/td-p/1310814?emcs_t=S2h8ZW1haWx8c29sdXRpb25fdG9fcXVlc3Rpb258S1QxNkRTTDlLRkxCVVJ8MTMxMTM1MnxBQ0NFUFRFRF9TT0xVVElPTlN8aEs

thread,

Thank you 

[AminT_Intel]

 I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.