Hi,
Thank you for the response.
1) Before and during configuration, all user I/O pins are tristated.
2) Stratix® series, Arria® series, and Cyclone® series have weak pull-up resistors on the I/O pins
which are on, before and during configuration
I just confused with these 2 points. Point 1) says IO pins are tristated. & point 2 says IOs have weak pull-ups.
My confusion is if weak pull up is connected to IOs before & during configuration, what is the meaning of tristated (point 1)?
Whether this means that the internal IO buffers of FPGA is not connected to the pins (tristated) but FPGA IO pins are pulled up with resistors so that when we physically measure the voltage before or during configuration, we can get VCCIO voltage level?
With regards,
HPB