Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

GXB_transceivers

Altera_Forum
Honored Contributor II
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hi, 

I am using Quartus II 9.0 (SP2) and EP2AGX190FF35I5 device. 

 

I have basic doubts regarding ARRIA II GX Tranceivers, which i am listing below..... 

 

1. How to enable the transceivers?whether i have to use any megawizad function? 

2. When i am compiling quartus is giving a critical warning "Synopsys Constraints File" does not exist for timing model. 

3. In report quartus is showing timing models as "preliminary. 

4. Pin assignments i am assigning as PCML 1.5V....when compiling quartus is giving errors as: 

 

Error: Differential I/O output pin Tx_gxb[0] is assigned to a non differential location B31. However, it must be assigned to a differential output location 

Error: Differential I/O input pin Rx_gxb[0] is assigned to a non differential location C33. However, it must be assigned to a differential input location 

 

 

thanks 

Ramu
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Altera_Forum
Honored Contributor II
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1 - Transcievers are enabled by creating an instance of the altgxb megafunction in your design and connecting it to an appropriate transceiver pin. 

2 - The "Synopsys Constraints File" (SDC) provides Quartus with the timing constraints for your design. You must create one: 

http://www.altera.com/support/software/timequest/sof-qts-timequest.html 

3 - Timing models for Arria II GX are preliminary in Quartus 9.0. 

4 - This error can occur if you've assigned the pin to be a differential I/O type but the pin is not actually used or connected to appropriate logic in your design (e.g. you haven't connected it to an altgxb instance). 

 

Jake
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