I am starting to develop with CPLDs, and when looking for basic MAX 7000 circuits, I don't find anything on the net. Is there a sample basic circuit for integrating a MAX 7000A into a schematic? Showing which connections have to be made for it to work? Or is there a schematics of a simple development board that I could copy from? I am using it in combinatorial mode without clock, with 3V3 inputs, and I would like to program it in-circuit using an ARM microcontroller that is part of the same circuit or external JTAG programmer connected via pin header. I am using altium 16.
I will be using the 7032 or 7064 version with PLCC 1.27MM pitch package, as I am soldering the prototypes myself. Any link to beginners resources will be greatly appreciated. Especially to circuit design for integrating those CPLDs.
Thanks and best regards,
Unfortunately, we not have any MAX 7000 dev kits anymore.
We can find datasheets and pin-out tables from below link.
You can find other CPLD kit information from below link
Well the datasheet has all the info you need. It lists the VCC and GND pins and the VCC power supply requirements (ie, 3.3V +/- 10%). Programming is via JTAG pins TCK, TMS, TDI, TDO which would connect to GPIO pins on a microcontroller and/or a connector for use with an Altera ByteBlaster programming adapter. All the other I/Os are 5V tolerant and connect to whatever devices you want. I don't know what else a schematic could show you?
If you are not using any clocked FFs then you don't need a clock source and can operate purely combinatorial logic.
For sure you need to understand the max current drive limits for the I/Os. Datasheet will tell you the limits.
The 7000A series is 3.3V supply and I/O voltage, but the I/Os are 5V tolerant. So you can add a pullup to +5V tied to an output if need be.
JTAG is its own protocol (NOT the same as UART/SPI/I2C). So unless you have a JTAG knowledgeable master (like an Altera ByteBlaster) you will have to connect the JTAG pins to standard I/O ports on your micro, and then write the code that simulates the JTAG protocol. Be aware however that writing the code on a micro that does low level JTAG (ie, bit banging TCK/TMS/TDI/TDO correctly) is just a very small part of the problem. Writing all the code that implements full device programming thru JTAG is a whole other significant project. Old Altera used to supply source code for such a function (the old JAM STAPL player) but I don't know if that is still around now that Intel has assumed control.
Personally I would recommend getting an Altera USB Blaster clone (Terasic has a nice one that is 100% Altera compatible that is inexpensive).