10-21-2020 12:43 AM
FYI... Intel FPGA forum community is meant to support dev kit board developed by Intel only and not for 3rd party vendor board like this DE10-Nano board which is development by Terasic
- I recommend you to checkout DE10-Nano board website for more info and reference design
- You can also email Terasic for support enquiry - firstname.lastname@example.org
- Is there any way I can connect the ethernet PHY to the FPGA using the TSE IP ?
- I can comment TSE IP do support RGMII interface but I am not familiar with the PHY chip on DE10-nano board.
- Feel free to contact terasic directly to check out with them
- Can the pins be shared between the HPS and the FPGA ?
- No, Cyclone V SOC HPS has its own dedicated IO pins while FPGA has its own dedicated IO pins