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HLS compiled qsys modification and regeneration problem

New Contributor I

Hi everone,

I came across a question about modifying HLS generated qsys and regeneration of the modified system.

My quartus SDK compiler is 15.1.

I compiled a .cl file using command "aoc -s -v  ().cl --board (board_name)".

A qsys named system.qsys had been generated. Next I modified this system by adding some customised components.

After saving ths system, I regenerated this system.qsys into .v file. The command I used for regenerate was 

'qsys-generate system.qsys --synthesis=VERILOG --family="CYCLONE V" --simulation=VERILOG'.
After doing this, however, the system.v was not shown in the synthesis folder. Nor was it shown in simulation folder.
Before regeneration, I had already removed all HLS generated system folder and "system.tcl" file. However, the system.v was still not there.
May I ask if the .v file has been hidden or something else happened? 
I have also attached the whole project for your references.
Thank you very much!
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1 Reply
New Contributor I

Hi everyone,

A new update here:

when I use aoc -v to compile the project, some strange messages occur:

com.altera.hdlwriter.EntityWritingException: Connection is not connected float_add:avm_local_bb1_ld__inst0 -> ?
at com.altera.hdlwriter.internal.OldEntityWriterInternal.addConnection(
at com.altera.hdlwriter.internal.OldEntityWriterInternal.writeHDLInternal(
at com.altera.hdlwriter.internal.EntityWriter.writeHDL(
at com.altera.sopc.generator.EnsembleGenerationFileSet2.generate(
at com.altera.sopc.generator.FileSet2.generate(
at com.altera.sopc.generator.Sellafield.generate(
at com.altera.sopcmodel.sbtools.sbgenerate.SbGenerate.performGeneration(
at com.altera.sopcmodel.sbtools.sbgenerate.SbGenerate.act(
at com.altera.utilities.AltCmdLineToolBase.runTheTool(
at com.altera.sopcmodel.sbtools.sbgenerate.SbGenerate.main(
May I ask has anyone come across this before?
It seems that my defined IP has problems, but don't know why it has problems..
Thank you again!