HPS EMAC access from custom fpga logic

[BJona]

Hello,

Since I don't want to use HPS for now, I would like to know if it's possible to control the 3 EMACs IP on the HPS side from the FPGA?

thank you!

[EBERLAZARE_I_Intel]

Hi,

Firstly, may I know which device you are referring to? If you want to use the HPS EMAC you still need to boot up the HPS and enable the FPGA to HPS bridge to allow the interconnect.

For Cyclone V SoC, you may refer below example:

https://rocketboards.org/foswiki/Projects/CycloneVRGMIIExampleDesign

[BJona]

Hi,

It's for an Arria10sx device.  

thank you for your reply and links, i'm gonna chek it.

[EBERLAZARE_I_Intel]

Hi,

For Arria 10 you can check the A10 SGMII reference design here:

https://rocketboards.org/foswiki/Documentation/A10SGMIIRDUserManualLTS