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Valued Contributor III
1,026 Views

Help creating circuit using a decoder or multiplexer please

I'm having trouble understanding how to create a decoder or multiplexer circuit on Quartus. So far I have made a divder circuit truth table with 4 inputs and 5 outputs. I'm having a very hard time finding examples of making a circuit for this any help would be great!

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Valued Contributor III
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Hi , you can try CASE statement in VHDL or Verilog, and you can consider AHDL truth_table. 

if you insist on schematic consider it as long way.
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Valued Contributor III
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--- Quote Start ---  

Hi , you can try CASE statement in VHDL or Verilog, and you can consider AHDL truth_table. 

if you insist on schematic consider it as long way. 

--- Quote End ---  

 

 

 

I apologize I should of mentioned that I haven't learned what that is yet, this all seems like french to me. The directions I have say to realize the CSOP expressions for the divider circuit outputs using MSI decoders or multiplexers and any additional SSI logic needed. Use as few MSI devices and as few additional SSI devices as possible.  

And I understand what decoders are and multiplexers but I just cant seem to comprehend how to do what its asking for.
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