I'm working on FPGA with I/O banks configured as 3.3-V LVCMOS with current strength of 2ma.
I have a requirement to change the current strength to 16ma for some of the signals in this I/O bank which is not supported with 3.3-V LVCMOS. Can i change the I/O bank configuration to 3V LVCMOS? What will be impact on other signals in this I/O bank?
Thanks in advance
Hello Naveen ,
Apologizes for delay ,I think you can use it as long as your voltage compatibility analysis (VIL/VIH and VOL/VOH) satisfy the requirement. Also make sure trough IBIS model you are getting sufficient current strength and check the signal integrity as well.
Thank you ,