- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
The PHY used is L-Tile/H-Tile Transcever Native PHY Intel Stratix 10FPGA IP . The Data rate requirement of PHY is 16000Mbps. Since the number of GX PINs of FMCP is not enough, GXT PINs(for example PIN_AL7/PIN_AH5/PIN_AF5 etc.) need to be used. However, according to the configuration requirements of GXT in the "L- and H-Tile Transceiver PHY User Guide", it can only be configured from 17400Mbps to 25800Mbps.Please tell me how to configure.
Thanks!
Link Copied
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
GX pins can be used for GXT.
Thank you,
Kshitij Goel
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Thanks for your reply, I've tried this way before but got new errors. I've added new support. You can close this.
Thank you!
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
Thank you,
Kshitij Goel
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
the configuration range specified in the "L- and H-Tile Transceiver PHY User Guide" for GXT pins is limited to 17400Mbps to 25800Mbps.

- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page