How can I find the reason why my Stratix III EP3SL340H1152I3N doesn't work.

[ZNiu0]

I designed circuitry for Stratix III EP3SL340H1152I3N. The FPGA doesn't work. I tested the voltage of the nStatus, CONF_DONE, and CRC_ERROR. The nStatus and CONF_DONE are always low and aren't released. The CRC_ERROR is always high which means there is wrong with SRAM. I don't know how to solve this problem. My power chipsets are switchers whose Line regulation and Load regulation satisfied the reqierement in Pin Connection Guidelines. Please help me .

[ShafiqY_Intel]

Hi ZNiu0,

I'm not really sure the root cause of your CRC_ERROR always high.

Maybe you can have a look at one of this KDB. This might help you.

• https://www.intel.com/content/altera-www/global/en_us/index/support/support-resources/knowledge-base/component/2017/warning--real-time-crc-errorcheckfrequencydivisor-value--1--in-d.html
• https://www.intel.com/content/altera-www/global/en_us/index/support/support-resources/knowledge-base/solutions/rd10142014_887.html
• https://www.intel.com/content/altera-www/global/en_us/index/support/support-resources/knowledge-base/solutions/rd07012009_883.html

Thanks