Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
20645 Discussions

How can I make the Marvell 88E1111 operate in GMII instead of RGMII?

Altera_Forum
Honored Contributor II
1,757 Views

Hi, 

 

I've recently gotten the ETHERNET-HSMC Card for use with the Cyclone V GX Starter Kit. 

 

Problem: It uses RGMII by default, and I want GMII. 

 

The manual just says that this can be changed through the management interface of the Marvell 88E1111, which is the PHY on the card. 

But how? RGMII is not part of the IEEE Standard, so the respective register must be vendor-specific. Information about vendor-specific registers is in tha datasheet, which is not publicly available. 

On the other hand, it wouldn't make sense for Intel/Altera/Terasic to sell a device that supports GMII, RGMII, and SGMII, without giving the customer the means to choose between these options. 

 

What am I missing? 

 

PS: This probably should have been posted under "Development Kit Related". Sorry about that.
0 Kudos
2 Replies
Altera_Forum
Honored Contributor II
543 Views

Hello Stefan123, 

The "Intel® FPGA IP for Triple-Speed Ethernet" manual can help you. 

The Triple-Speed block can be configured many ways and manages the communication with the 88E1111 GMII, RGMII and SGMII. 

There is a basic tutorial available "https://www.altera.com/support/support-resources/design-examples/intellectual-property/embedded/nios-ii/exm-tse-sgdma.html"  

Best Regards, 

Johi.
0 Kudos
Altera_Forum
Honored Contributor II
543 Views

There should be a ban on Marvel products for development kits, the lack of public documentation make then a pain to use. 

The interface mode is set with the HWCFG_MODE[3:0] register. It should be 1111 for MII/GMII and 1011 for RGMII. 

 

The initial value of HWCFG_MODE[3:0] value comes from the configuration pins. I haven't look at the PCB but I guess that you can't change that from the FPGA. 

After power up you can change the mode by writing the new value of HWCFG_MODE[3:0] to bits 3:0 in register 27, and then perform a software reset. To perform a software reset, set the bit 15 of register 0 to 1. It will be cleared to 0 automatically when the reset operation is done.
0 Kudos
Reply