- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi all,
I have a signal as an input port from the top which will give a reset value to registers at reset. suppose an example like if(rst_n==1'b0) begin x<=a; else x<=s; Now tool is converting this register into a latch and in the timing reports the path consists of a loop. the tool also issues a warning of a combinational loop for this signal. So i want to tie this signal (a) which is an input port of my system to some value in order to tell the tool that it will have a static value and not a variable one, which the tool is understanding . So any qsf assignment if known do help me out.Link Copied
2 Replies
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
If you really need x to be a register, you should use a clock and include your code into a
always @ (posedge clk) block. In the way you are using x here, a combinatorial assignment is enough: assign x = (rst_n==1'b0) ? a : s; and x should be defined wire instead of reg- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
sorry chris i dint gave complete info...the assignments are in a sequential logic only..i mean the sensitivity list has the clock...sorry for the confusion

Reply
Topic Options
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page