How do I tell whether I should implement the machine I want to build as a field programmable gate array?

[KSimo1]

The machine I want to implement has two input control bits and a clock bit, two output control bits, and 256 in/out data bits. It reads in n 256-bit records (each with a 192-bit key) in 2n clock cycles, and then after 0 to 2n/3 clock cycles of processing, starts outputting those records in sorted order, again taking 2n clock cycles to read them out. I kind of imagined just writing VHDL that used components that were essentially logic gates to build up my machine, and that that VHDL would generate the smallest group of transistors necessary for my machine to work. That really doesn't sound like a field programmable gate array. Can someone on this group explain to me what the benefits of FPGAs would be in building my machine, as opposed to just finding the smallest number of transistors there are that would do the job?

My machine needs to be fast and inexpensive. As I understand it FPGAs are fast, but they might be expensive. If I used FPGAs for my machine until I got it working, would it then be pretty straightforward to convert it from FPGAs to an optimally inexpensive form?

[ak6dn]

1) First thing to do is define your machine in detail and write the VHDL for it. Then run it in a simulation environment to see if it really does what you intend, functionally and performance-wise. You can do this more or less independent of the implementation technology, FPGA or ASIC.

2) Then once it is working in simulation, you can size/find an FPGA to act as a first trial implementation. If you just want a lab validation vehicle FPGA is the way to go. Even for low to medium production volumes FPGA is still your best bet.

3) Then if it is wildly successful and you can convince venture capitalists to front you several million dollars you can decide to go for an ASIC suitable for high volume production (like more than a million units a year). Until you do 1 and 2 forget about 3.

[KSimo1]

Great. Thanks!