The cyclone IV PLL takes in a 144 bit stream for PLL reconfig. This contains 18 bits for each C4, C3, C2, C1, C0, M and N and 9 bits each for charge pump and loop filter. This information is contained in table 5-7 on pg 5-37 of the cyclone iv handbook.For a given input frequency and desired output frequency from the PLL. How does one determine the value of all these things I mentioned above? Is there a unique set of values to get a specific output frequency-phase relationship to an input frequency or can multiple values of this 144 bit (made up of 9 fields in total) word achieve the same result?
It's a bit involved and sadly, the short answer is on page 5-26:--- Quote Start --- The Quartus II software automatically chooses the appropriate scaling factors according to the input frequency, multiplication, and division values entered into the ALTPLL megafunction. --- Quote End --- Going through the same process in the past, I was not able to find an appnote or source code that approximates the behavior of the MegaWizard GUI. You basically need to write your own software that solves for (M and N) to achieve a stable VCO frequency that is the least common multiple of your desired Cx divider output frequencies. In my applications, I have relied on passing values precomputed on the PC, and have limited in-system computation of the values to read-modify-write of the Cx dividers to perform simple adjustments (e.g. half/quarter rate modes of operation). --- Quote Start --- Is there a unique set of values to get a specific output frequency-phase relationship to an input frequency or can multiple values of this 144 bit (made up of 9 fields in total) word achieve the same result? --- Quote End --- Yes, you can run the VCO at higher frequencies than necessary and use correspondingly larger Cx dividers to get the same output frequency. There may be multiple values that satisfy your requirements.