- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
I've worked with NIOSII system + JTAG debug module and everything was correctly done. Than following my new system configuration I've disabled JTAG module in NIOSII and initialized my onchip memory using HEX file while compiling my system I suppose that the onchip memory is initialized with HEX file (not empty it is generated from my soft using Make targets option and resized with Quartus than set as initialization file). After generation of JIC file, I've no results. What would be the problem after removing JTAG debug module?
- Tags:
- Include
Link Copied
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
As you have mentioned "I've no results", can you explain more on this?
After you generate the .jic file, may I know what the steps have you done after?
Thanks
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
According to https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/nios2/n2cpu_nii5v1.pdf, JTAG debug module used to provide on-chip emulation features to control the processor remotely from a host PC. Firstly, the design was compiled, then the .sof file and .hex file was generated. These files will be coverted to .jic file. The .jic file is used to configure the data from the host to flash device. Since, the JTAG debug module is disable, then the .jic file is not download to the memory. Hence, there is no result came out.
You have to enable JTAG debug module to solve this problem.
Thanks
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page