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孝大村00
Beginner
429 Views

How to implement sspi command in uboot in Arria10 SoC Devkit

I am running Linux on Arria10 SoC Devkit.

I refer to the link here to create uboot. And it is working fine.

With Arria10 SoC Devkit, you can give instructions to the System Controller (MAX V) from the FPGA via SPI.

Then, after Linux booted, the LED connected to the System Controller was turned on / off correctly using the SPI driver.

However, after starting uboot, the "sspi" command does not work properly. If the sspi command is sent, no response is returned and the device will restart after a while.

What's wrong?

[Configure uboot]

Difference from socfpga_arria10_defconfig

  • CONFIG_CMD_SF=y
  • CONFIG_CMD_SPI=y
  • CONFIG_DEFAULT_SPI_BUS=0
  • CONFIG_DEFAULT_SPI_MODE=0
  • CONFIG_DM_DEBUG=y
  • CONFIG_DESIGNWARE_SPI=y

 

[Device Tree]

[ socfpga_arria10.dtsi ]

spi1: spi@ffda5000 {

compatible = "snps,dw-apb-ssi";

#address-cells = <1>;

#size-cells = <0>;

reg = <0xffda5000 0x100>;

interrupts = <0 102 4>;

num-chipselect = <4>;

bus-num = <0>;

/*32bit_access;*/

tx-dma-channel = <&pdma 16>;

rx-dma-channel = <&pdma 17>;

clocks = <&spi_m_clk>;

status = "okay";

 

spidev@0 {

compatible = "spidev";

reg = <0x0>;

spi-max-frequency = <100000>;

};

};

 

[ socfpga_arria10_socdk.dtsi ]

 

<< Add spi0 in aliases >>

aliases {

ethernet0 = &gmac0;

serial0 = &uart1;

i2c0 = &i2c1;

spi0 = "/soc/spi@ffda5000";

};

 

<< Delete >>

a10leds {

compatible = "gpio-leds";

 

a10sr_led0 {

label = "a10sr-led0";

gpios = <&a10sr_gpio 0 1>;

};

 

a10sr_led1 {

label = "a10sr-led1";

gpios = <&a10sr_gpio 1 1>;

};

 

a10sr_led2 {

label = "a10sr-led2";

gpios = <&a10sr_gpio 2 1>;

};

 

a10sr_led3 {

label = "a10sr-led3";

gpios = <&a10sr_gpio 3 1>;

};

};

 

<< Modify >>

&spi1 {

status = "okay";

 

resource-manager@0 {

compatible = "altr,a10sr";

reg = <0>;

spi-max-frequency = <100000>;

/* low-level active IRQ at GPIO1_5 */

interrupt-parent = <&portb>;

interrupts = <5 IRQ_TYPE_LEVEL_LOW>;

interrupt-controller;

#interrupt-cells = <2>;

 

a10sr_gpio: gpio-controller {

compatible = "altr,a10sr-gpio";

gpio-controller;

#gpio-cells = <2>;

};

 

a10sr_rst: reset-controller {

compatible = "altr,a10sr-reset";

#reset-cells = <1>;

};

};

};

 

If you know how to make sspi command work with uboot, please help me !

 

0 Kudos
7 Replies
孝大村00
Beginner
270 Views

I solved myself.

The problem was resetting "Per-Master Security bit for spi_master1: 0xFFD13020".

It was necessary to add "resets = <& rst SPIM1_RESET>;" to uboot DTS.

The changes are as follows.

[Configure uboot]

CONFIG_CMD_SPI=y CONFIG_DEFAULT_SPI_BUS=0 CONFIG_DEFAULT_SPI_MODE=0   CONFIG_DESIGNWARE_SPI=y

[Device Tree]

<< socfpga_arria10.dtsi >>

spi1: spi@ffda5000 { compatible = "snps,dw-apb-ssi"; #address-cells = <1>; #size-cells = <0>; reg = <0xffda5000 0x100>; interrupts = <0 102 4>; num-chipselect = <4>; bus-num = <0>; /*32bit_access;*/ tx-dma-channel = <&pdma 16>; rx-dma-channel = <&pdma 17>; resets = <&rst SPIM1_RESET>; /* ADD */ clocks = <&spi_m_clk>; status = "okay";   spidev@0 { /* ADD---> */ compatible = "rohm,dh2228fv"; reg = <0x0>; spi-max-frequency = <100000>; }; /* <---ADD */ };

<< socfpga_arria10_socdk.dtsi >>

aliases { ethernet0 = &gmac0; serial0 = &uart1; i2c0 = &i2c1; spi0 = &spi1; /* ADD */ };

However, while Read seems to work fine, Write does not seem to work properly.

>> sspi 0:0 16 02C0 --->LED control is not performed correctly.

>> sspi 0:0 16 0500 ---> The status of DipSW and Push Button can be read correctly.

Thanks!​

270 Views

Hi,

 

I apologize for the late response, we do not have specific documents regarding usage of "sspi" on the Uboot.

 

Were there any errors during booting the Uboot? Was the booting successful?

孝大村00
Beginner
270 Views

Hi

​There were no errors while launching Uboot.

boot has also been successful.

It did not affect Linux boot and behavior.

​The reason that sspi Write did not work properly was the difference in the "Read / Write Timing Diagram" of the system controller (MAX V).

CSn is not deasserted even at byte boundaries in Write, but is deasserted in Read.

To implement this Timing Diagram, you need to use the mode of the sspi command.

 

However, in the default uboot, the mode of the sspi command that succeeded the first time is to be used continuously in the next command, and the mode cannot be changed by the second command.

-> Cannot operate by switching Read / Write.

 

So I modified spi-uclass.c so that I could switch the mode for each command.

Specifically, just comment out "mode = plat-> mode;" on line 333 of spi_get_bus_and_cs ().

By doing this, you can switch the mode of the sspi command every time the command is issued and execute it.

 

However, for Read, Data is shifted regardless of which mode is used, and the MSB or LSB is lost.

There seems to be no problem with Write.

I think Write needs to work properly, so I don't think there is a problem at the moment.

 

=> sspi 0:0.3 16 02a0 ---> LED OK

=> sspi 0:0.0 16 0500

0075 ---> MSB is missing.

 

best regards

 

270 Views

Hi,

 

Thank you for the feedback and I will channel this to our engineering team to seek their input on this issue.

 

Can you share the Quartus/SoC EDS version used for this build, uboot and kernel version?

 

Thank you,

 

Regards.

孝大村00
Beginner
270 Views

Hi.

I will share my environment.

Quartus : 18.1 std

U-Boot : 2019.04

Kernel : 5.4.13

<!>

As a supplement, KP occurs when the SPI Driver of Kernel is enabled.

When build a Kernel, set the SPI Driver to Disable.

I was fine because I didn't need to use SPI on Linux.

A countermeasure is required when using SPI on Linux.

​Thank you.

best regards

270 Views

Hi,

 

Thanks for the information, do you have any additional questions?

孝大村00
Beginner
270 Views

Hi,

 

I do not have any questions.

​Thanks for your support.

 

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