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Altera_Forum
Honored Contributor I
1,431 Views

How to load BSLD file in Quartus 2 to run boundary scan?

Hello everyone 

Does anyone have instruction how to run boundary scan family device MAX3000A. 

I have hardware JAG tag with USB blaster, BSDL file, and Quartus 2 ver 11.0
0 Kudos
6 Replies
Altera_Forum
Honored Contributor I
74 Views

Hi 

 

Refer below links 

https://www.youtube.com/watch?v=c_hh31u3fdc 

https://www.youtube.com/watch?v=uvprggtgypq 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
Altera_Forum
Honored Contributor I
74 Views

What do you want to achieve? There's no boundary scan feature built into Quartus as far as I'm aware of. You need to a third party tool to perform boundary scan. I'm using e.g. TopJTAG probe.

Altera_Forum
Honored Contributor I
74 Views

 

--- Quote Start ---  

What do you want to achieve? There's no boundary scan feature built into Quartus as far as I'm aware of. You need to a third party tool to perform boundary scan. I'm using e.g. TopJTAG probe. 

--- Quote End ---  

 

 

Thank you for help. I think you give me right direction here. Basically I would like scan all pins in my device MAX3000A EPM3512AQI208. I download the BSD file from Altera.  

What are all files need to run TopJTAG? Do I need some special hardware?  

Currently I have USB Blaster has 10pins connect to my device and I can flash CPLDs image in pof format in Quartus 2 Programmer. These pof files that generate from Altium Designer. 

Now I am find a way to do Boundary Scan.
Altera_Forum
Honored Contributor I
74 Views

 

--- Quote Start ---  

Hi 

 

Refer below links 

https://www.youtube.com/watch?v=c_hh31u3fdc 

https://www.youtube.com/watch?v=uvprggtgypq 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation) 

--- Quote End ---  

 

 

These video doesn't show me how to do boundary scan.
Altera_Forum
Honored Contributor I
74 Views

 

--- Quote Start ---  

These video doesn't show me how to do boundary scan. 

--- Quote End ---  

 

Me neither. Generating BSDL post configuration files can have a purpose in boundary scan testing, but you still need a dedicated test tool. 

 

That's how I do boundary scan test with TopJTAG probe: 

 

Generate a TopJTAG project by importing the Altera .bsd file and optionally the Quartus .qsf file. 

 

The latter gives me symbolical names for all assigned design pins. 

 

Perform the test with configured FPGA in Sample mode to watch the user program operation. 

 

Or switch to Extest, control pin states to perform specific tests.
Altera_Forum
Honored Contributor I
74 Views

Hi, 

 

Check the link below for more information 

https://www.altera.com/support/support-resources/knowledge-base/solutions/rd06172009_121.html 

https://www.altera.com/support/support-resources/support-centers/devices/programming-tools/boundary-...  

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)