How to prepare example for transciever toolkit

[JoEl]

Hi everybody,

I am facing problem with transciever toolkit, cause I dont know how should I prepare design for it.

I have Arria10 device 10AX032E4F27E3SG with quite few video interfaces, actually I use all transcievers. On old board everything works, not perfectly but works.

For newer design I want to prepare testing design which can be used for analog parameters and autorate_phy configuration.

How can I do that ?

I thought that I place 12 Arria 10 Transceiver Native PHY IP Cores in RX/TX mode with configuration endpoint enabled as is in youtube video series but it doesnt seems so stright.

I folowed this walkthrougth https://www.intel.com/content/www/us/en/programmable/documentation/nik1398707230472.html#nik1398706811600

but ended up with open reconfiguration interface and I dont know what should I connect where.

[CheePin_C_Intel]

Hi, As I understand it, you are inquiring about creating test design with transceiver toolkit in A10 devices. For your information, you may refer to the following simple design example and further customize to your device and board to try out: https://fpgawiki.intel.com/wiki/Arria10_Transceiver_PHY_Basic_Design_Examples#Arria_10_Native_PHY_with_Transceiver_Toolkit_design_example I will be emailing your the QAR in case you are having issue downloading the QARs as it seems like I am unable to upload it to the thread. Please let me know if there is any concern. Thank you. Best regards, Chee Pin

[JoEl]

Hi Chee,

That is what am I looking for, but its not possible to download it anymore... Please email me QAR. Iam using Quartus Pro 18.1.2 so hope I can open it.

Best regards,

Josef Elias

[CheePin_C_Intel]

Hi, For your information, I have sent the file to your email (josef.elias@...) yesterday. In case it does not reach you, I have resend again today. Please feel free to let me know if you still have not yet received it. Thank you.

[CheePin_C_Intel]

Hi,,

Just to follow up with you on this. Thank you.

[CheePin_C_Intel]

Hi,

I believe the initial inquiry in this case has been addressed and I would set this case to close at this moment. Thank you.

[JoEl]

Hi cpchan,

Agree, but one more wish - is it possible to bring back link to that project for future cause anybody looking for same thing find just that he need to email you for files.

Thanks again,

Joe

[CheePin_C_Intel]

Hi Joe,

Thanks for your update. As I understand it from our web team, they are currently migrating the content on our wiki to different platform. Once the migration is completed, our customers would be able to download visit the content in the new platform. I have yet to receive any detail ie web link to the new platform. In the meantime, you may feel to contact us through Forum in case you are looking for any specific design examples. Sorry for the inconvenience.

Please let me know if there is any concern. Thank you.

Best regards,

Chee Pin

[CheePin_C_Intel]

Hi Joe,

 I would set this case to close at this moment. Thank you.

[A_MISHRA]

Hi @cheepinc_Intel​ , i am also looking for design example for arria 10 transceiver phy test using transceiver toolkit. My FPGA is 10AS066K2F40E1HG and I am using Quartus Prime Pro 17.1. Can you please mail it to [ajay.mishra@bitmapper.com], as the link which you have given in this thread, is not opening.

[CheePin_C_Intel]

Hi,

[A_MISHRA]

hello sir

[A_MISHRA]

actually i wanted example design. the link that you have shared is not opening, can you mail it to me

[CheePin_C_Intel]

Hi,

Sorry for the inconvience. I notice that my previous post only contain "Hi" and the rest of notes seems to be missing. I understand that you have open another thread on this and I have sent you the design ZIP to your email from the Forum server. Please let me know if you are not receiving it. Thank you.