I/O pins of “EP2C20Q240C8N”

[Altera_Forum]

I’m using “EP2C20Q240C8N” in my design .Therefore, I have been reading the “Cyclone II Device Handbook” and the “EP2C20_Pinout” page 2-59 “Each I/O bank has its own VCCIO pins. A single device can support 1.5-V, 1.8-V, 2.5-V, and 3.3-V interfaces; each individual bank can support a different standard with different I/O voltages. Each bank also has dual-purpose VREF pins to support any one of the voltage-referenced standards (e.g., SSTL-2) independently”. Therefore I’m confused about the following: 

1- Is it necessary to connect all VCCIO pins to certain fixed voltage for each bank? 2- I saw in some of Altera designs that all VCCIO pins of bank1 is connected to a specific voltage. At the same time, 2 of the VREF pins for this bank are connected also to another fixed voltage and the other VREF pins of this bank are not connected to this fixed voltage (which means that they are used as IO pins). So, what is the voltage of the IO pins of this bank. Shall we refer to the VCCIO or VREF? 3- In Cyclone II , There are 4 VREF pins for each bank of the available 8 banks (VREFB[0--7]N[0--3]). What does N refer to? And can we use each VREF pins separately? 4- Kindly confirm that for the dual purpose IO pins , can I differentiate between regular IO and optional function using Quartus II without any additional specific hardware? If not , How to do it? 

[Altera_Forum]

As you reported, VREF pins are needed for voltage referenced I/O standards. The banks are further divided into four Vref-groups, you'll find the exact assingment in the pinout files. Because you're apparently not using voltage referenced standards, simply ignore the optional Vref function of these pins. 

 VCCIO pins must be completely connected to the respective bank voltage of your choice:  Optional pin functions are mostly set in the Quartus software, a few are implicitely set by using a particular I/O standard or configurations scheme.

[Altera_Forum]

Hello, 

Thank you for help. You said that "Optional pin functions are mostly set in the Quartus software, a few are implicitely set by using a particular I/O standard or configurations scheme". Which pins are set by using a particular I/O standard or configurations scheme?   Thanks &BR   Waiting for your reply asap

[Altera_Forum]

--- Quote Start ---  Which pins are set by using a particular I/O standard or configurations scheme?  --- Quote End ---  I don't think it's reasonable to retell the documents you have already read. Most of the pin options are dedicated to applications that you'll never intend. Why don't you ask specific questions related to your application?