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JKynd
Beginner
412 Views

I have a little problem with State Machine waveform Simulation using Quartus software.

I am trying to simulate a state Machine wave form using Quartus. I keep getting the letter U when inserting fstate in the wave form as showing in the picture below. I'm suppose to get undefined, so I can simulate them. what is the problem and what do I need to do?.

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9 Replies
Vicky1
Employee
25 Views

Hi,

"U" represents the undefined.

Refer the below link & try to simulate the design, for simplicity initialize the fstate in design,

https://www.youtube.com/watch?v=e_ksjHd6sY0

 

please let me know, if you have different concern.

Regards,

Vicky

JKynd
Beginner
25 Views

sorry but that does not help. I know how to do a waveform simulation. The problem is when I simulate my state Machine I get U instead of the fstate number as fstate0, fstate1 and so on. As showing in the pic below.

sstrell
Moderator
25 Views

Can you post some code and your testbench?

 

#iwork4intel

JKynd
Beginner
25 Views

This is the VHDL code

JKynd
Beginner
25 Views

part2

JKynd
Beginner
25 Views

and do you mean the test bench for ModelSim?

Vicky1
Employee
25 Views

Hi,

Please provide the project file("Project" menu -> "Archive Project").

 

Regards,

Vicky

JKynd
Beginner
25 Views

Here,

Thanks

Vicky1
Employee
25 Views

Hi,

Thanks for the design file.

I tried to replicate the issue & I observed the same behavior.

I think, Quartus may represents the signals for inputs, outputs & states only & I am not sure about this.

 

Regards,

Vikas