Cyclone FPGA IO can directly connect the pin to the Ground. But it is recommended to connect through resistor to protect from accidentally driving a pin as output.
Please refer the below link for Cyclone handbook Table 4–3. Cyclone Device DC Operating Conditions ,
There is also feature in Intel FPGA called , " Bus hold " You can refer in section in handbook.External pull-up or pull-down resistor is not necessary to hold a signal level when the bus is tri-stated.
Note: The bus-hold circuitry is only active after configuration,whereas external resistor are active before and during configuration.