I have recently experienced issue explained here (https://www.alteraforum.com/forum/showthread.php?t=45474) - EPCS device attached to Cyclone III is not erased by the Quartus II, still containing data written before. The board is not designed for EPCS hot replacement, and not designed to be controlled through JTAG interface.Quartus II seem does not have capability to reset block protection bits, and it seems the least pain for me would be to design application which would talk to EPSC through AS cable. I think I can write custom application for my ByteBlaster II as its programming is about controlling wires through parallel interface, but I have no idea how to approach USB blaster. Is there any document explaining how to program USB blaster in order to have AS wires controlled in custom way?
There's an Quartus programmer option "Unprotect EPCS devices selected for erase/program operation", did you check if it works in AS mode?As for the USB Blaster protocol, there's no Altera documentation, but several clone projects on the internet that have reengineered it. There's also third party software interfacing USB Blaster through libusb or FTDI d2xx driver.
Thank you. I did not know it is so hidden in the Quartus programmer.Anyway tried it with no result. I anyway decided to make my own programming device (http://kb.gr8bit.ru/gr8bit-kb0018-gr8blaster-device-for-msx.pdf) to prove that status register is 0, but chip does not erase and register does not write. I opened support ticket with Altera.