IOPLL Source-Synchronous Compensation - Multiple Data Inputs

[KMour]

Hi there,

I'm using an IOPLL to generate a clock which is used to latch multiple data inputs.  The IOPLL is in source-synchronous mode, as its reference clock is edge aligned with the data inputs.  I understand that the IOPLL will only be able to compensate for one of the data inputs; which one will it choose?  Do I have control over this?

My device is a Cyclone 10 GX: 10CX220YU484E5G.

Thanks,

Kyle

[EngWei_O_Intel]

Hi Kyle

Thanks for your inquiry. Allow me some time to check on the IOPLL spec before getting back to you.

Eng Wei

[EngWei_O_Intel · Accepted solution]

Hi Kyle

Sorry for late response due to long weekend here.

Per our understanding, the compensation will be applied to all data input. We are seeing the compensation delay in the timing report.

Let us know if you are seeing something differently otherwise.

Thanks.

Eng Wei

[KMour]

Hi Eng Wei,

Thanks for your reply.  I didn't expect that to be the case, but it is consistent with what I'm seeing in the timing reports.

Best regards,

Kyle

[EngWei_O_Intel]

Hi Kyle

I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

Eng Wei