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If I set "Reverse serial" on an Arria 10 transceiver using TTK, what mode, Pre-CDR or Post-CDR, is set?

BCrou
Beginner
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CheePin_C_Intel
Employee
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Hi,

 

As I understand it, your have some inquiries related to loopback mode using TTK. As I checked through the Quartus user guide, seems like I am unable to find the "Reverse serial" loopback mode for the TTK. The information that I found is for serial loopback. Would you mind to share with me the specific Quartus version, A10 device as well as a TTK screenshot? Thank you.

 

By the way, to avoid any confusion, it is recommended for you to directly write to the specific registers. You may refer to the following sections in the A10 XCVR PHY user guide for further details:

 

1. Reverse Serial Loopback Mode (Pre-CDR)

2. Reverse Serial Loopback Mode (Post-CDR)

 

Please let me know if there is any concern. Thank you.

 

Best regards,

Chee Pin

 

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BCrou
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Hello Chee, I am using version 18.1 of the Quartus Prime Standard Edition. I have to use the Standard Edition because some aspects of a design I am using do not work with the Pro Edition. I am using an Intel ® Arria10® SoC 10AS066K3F40E2SG. Here is TTK screenshot showing Reverse serial option under Loopback mode: [cid:image001.jpg@01D568AC.DC971490] Note that this screenshot also shows the tcl script log for a proc I created called set_reverse_serial_pre_loop_phy that sets the bits for all of the channels to the configuration in the document to which you refer identified as “Pre-CDR”: [cid:image002.png@01D568AC.DC971490] And another screenshot showing the printout from a modified version of the status_dump_all proc that adds all the registers shown in the above: [cid:image003.jpg@01D568AC.DC971490] Is that the only way to be sure how the Reverse serial loopback is set (Pre or Post-CDR)? Is it possible to know what TTK does? Bill Croughwell System Engineer LUMEOVA Email: bill.croughwell@lumeova.com Mobile: 919-308-7051<tel:908-229-4651>
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CheePin_C_Intel
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Hi Bill,

 

Thanks for your update. It seems like I am unable to view the screenshots that you posted. Not sure if it is due to the server issue. 

 

However, regarding your inquiries, my recommendation would be to use the register writing methods which I believe you have been using currently with TCL proc. 

 

As to check on the TTK, you can cross check with your register dump and compare them with the table 277 and 278 in A10 XCVR PHY user guide to see if can match any of the combination for pre/post CDR.

 

Please let me know if there is any concern. Thank you.

 

Best regards,

Chee Pin

 

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BCrou
Beginner
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Hi Chee,

I finally got to doing this. I dumped the registers after setting Reverse Loopback and the pattern of bit values don't look like either pre or post CDR. So, I tried setting the bits according to the tables that you mention using tcl. When I set the "pre" values via tcl, TTK reports that it is "Metallic" loopback.

Bill Croughwell

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