Illegal I/O standard

[Altera_Forum]

Hi, 

 When I compile my design I end up in the following error: Error (169092): Illegal I/O standard 3.3 V Schmitt Trigger for pin <SCL> -- I/O standard not supported by output pins in target device   I do understand that the corresponding pin of the SCL node does not support Schmitt trigger I/O. My question is how do I identify which all pins are Schmitt trigger enabled or if any of the pins support Schmitt trigger. I am using a MAX10 FPGA (10M02).  Thanks in advance. :)

[Altera_Forum]

Hi, 

 according to the MAX 10 device datasheet, Schmitt trigger inputs are supported on all pins ("max 10 devices support schmitt trigger input on all i/o pins", see section "dc characteristics").  I think the problem is that you are trying to select Schmitt trigger characteristics for an output pin. A Schmitt trigger only makes sense for inputs.  I don't know though how this behaves when your pin is bidirectional. "SCL" sounds like an I2C clock pin; if you want to support clock stretching, that pin would have to be bidirectional ("inout" in VHDL). I would expect that you can configure such a pin as Schmitt trigger.   Best regards, GooGooCluster

[Altera_Forum]

Thankyou GooGooCluster, that exactly was the problem. The pin that I tried to make it Schmitt trigger was an output pin. Thanks a lot. :)