Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
21345 Discussions

Image Processing with DE1

Altera_Forum
Honored Contributor II
2,165 Views

Hello,  

 

My University here in Ecuador just got a new DE1 development kit with a Cyclone II. I'm completely new with programming FPGAs. My interest is designing a project for edge detection in real time with the Terasic TRDB_D56M camera. I am wondering what to use, which is the correct path to follow, using SOPC builder or just creating the code in Verilog? I have Quartus II Web Edition without a license; I have just the free version. 

 

Thanks for your help!
0 Kudos
4 Replies
Altera_Forum
Honored Contributor II
1,208 Views

You might want to contact the authors of this paper, if they are still at Altera: 

 

http://www.altera.com/literature/cp/gspx/edge-detection.pdf 

 

My guess is that the Video and Image Processing Megablocks would be a good place to start but it could certainly be done from scratch if you have a simple digital video input signal. 

 

Andrew
0 Kudos
Altera_Forum
Honored Contributor II
1,208 Views

I'll recommend to you download edge detector example from altera in which you can see an implementation of Prewitt edge detector for image processing developeed using DSP Builder under Simulink

0 Kudos
Altera_Forum
Honored Contributor II
1,208 Views

I also need to develop edge detection algorithm. Please help me

0 Kudos
Altera_Forum
Honored Contributor II
1,208 Views

There is some software like CODeveloper Universal.. this tool gives C code conversion to HDL. 

I tried it and works fine, but there is some disadvantages but other options overcomes it. 

 

This software quite nice it can generate code that can be connected to NIOS processor.. anyway try yourself:) I saw there an example of edge detector in Codeveloper Template projects.. it is very simple.
0 Kudos
Reply