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Altera_Forum
Honored Contributor I
1,485 Views

Incomplete list of devices in Convert Programming File

Hi folks, 

 

Can someone tell me why I don't have all the usual devices when choosing for the Flash Loader in the "Convert Programming File" window? (See screenshot 1) 

 

https://alteraforum.com/forum/attachment.php?attachmentid=14277&stc=1 If I go in "Add device" in the programmer, you will see that the list is more complete. I specifically need the "EP4CGXCF23", as otherwise it says: (See screenshot 2) 

 

Error (209025): Can't recognize silicon ID for device 1. A device's silicon ID is different from its JTAG ID.  

 

Thank you in advance, 

 

Carl
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8 Replies
Altera_Forum
Honored Contributor I
63 Views

It is about "grouping" all similar behavior devices. 

 

Pic. 1 This is because in "Convert Programming File", they share common way of converting e.g. sof to other format; For example, EP4CGX15 will cover all EP4CGX15BF14A7 + EP4CGX15BF14C6 + EP4CGX15BF14C8 + etc. In short sentence, it cover all subcategories fall under it. 

 

Pic. 2 Same with grouping, but this time is at programming/configuring the device side, so there involved more variant of programming way for devices fall under same categories; e.g. EP4CGX50DF27 will cover EP4CGX50DF27C6 + EP4CGX50DF27C7 + EP4CGX50DF27C8 but EP4CGX50 cannot cover EP4CGX50DF27C6 itself. In short sentence, it cover some subcategories fall under it but does not include all. 

 

Taken from https://www.altera.com/support/support-resources/knowledge-base/solutions/rd12132011_913.html. For Error code 209025. You have 2 programming headers (JTAG and Active Serial (AS)) on your board and are trying to program the memory e.g EPCS. By default, when first open programming windows, the default setting mode is JTAG header. Simply change the mode to AS, that's all. 

 

I would suggest you provide the steps how you generate the programming files e.g.(.jic). Because silicon ID=flash device, that you set might be wrong, e.g. EPCS and EPCQ mixed up and hard to notice if wrongly chosen. 

 

Best Regards, 

Tzi Khang, Lim 

(This message was posted on behalf of Intel Corporation)
Altera_Forum
Honored Contributor I
63 Views

Hi Lim, 

 

Thanks for the response. Unfortunately I only have access to the JTAG header, so the programming must be done through it. 

 

To generate my .jic file in the "Convert Programming File", I chose the .sof we use for the FPGA and for the flash loader, I chose the EP4CGX50. 

 

Is EPCQ for active serial x4 and EPCS for x1 ? I might have picked the wrong one, then.
Altera_Forum
Honored Contributor I
63 Views

 

--- Quote Start ---  

 

 

Is EPCQ for active serial x4 and EPCS for x1 ? I might have picked the wrong one, then. 

--- Quote End ---  

 

 

 

Yes, Select appropriate flash device.
Altera_Forum
Honored Contributor I
63 Views

Provide me the board model you are using, so I can tell you the board default type of memory soldered on it. 

 

Or, for faster solution, you can directly look on the board for the printed words e.g. EQCQxx. The label is always printed on the memory chip there. 

 

Best Regards, 

Tzi Khang, Lim 

(This message was posted on behalf of Intel Corporation)
Altera_Forum
Honored Contributor I
63 Views

Hi Lim, 

 

It's a custom board. The memory is a S25FL032P from Cypress. Normally we are able to flash it with the .rbf, but this time it does not work. That's why I am trying to do it using the flash loader from the JTAG connector.
Altera_Forum
Honored Contributor I
63 Views

Not recommenced. The supported device is shown in attachment Supported Memory.png. 

However, the electrical properties of Cypress memory is fine. See attachment. 

Would suggest choosing EPCQ32 to your S25FL032P while generating jic, and this does not guarantee success. Please proceed rbf if necessary.
Altera_Forum
Honored Contributor I
63 Views

Yeah, I did try with EPCQ32. 

 

Thanks anyway for your help, we'll proceed in another way.
Altera_Forum
Honored Contributor I
63 Views

Share fully your compilation log here for further investigation, from compile generate sof to jic to etc. 

Just for information, the compilation log should look like the attachment. 

 

Best Regards, 

Tzi Khang, Lim 

(This message was posted on behalf of Intel Corporation)
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