Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
20891 Discussions

Initiate FPGA power down or remove bitstream from a trigger

rohith1
Novice
943 Views

Is it possible to stop the program running on the fpga (flash the bitstream) based on a trigger on the fpga?

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4 Replies
YuanLi_S_Intel
Employee
928 Views

Hi,


Do you mean that, stop FPGA programming during bootup?


Regards,

Bruce


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rohith1
Novice
920 Views

No, let's say the FPGA is getting too hot or something like that. I want to sense that using the tsd and stop the FPGA from continuing its calculations

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sstrell
Honored Contributor III
910 Views

A TSD IP would have an output control signal alarm or interrupt you could use to shut off other parts of the design.

Once an FPGA is programmed/configured, it's going to continue running until it loses power or the device (not the design) is reset.  So you'd have to include logic in the design to perform any actions based on the TSD.

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YuanLi_S_Intel
Employee
892 Views

Well said! I hope that everything is clear now. Let us know if got any other question.


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