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SDeor
Beginner
860 Views

Is Max 5 CPLD code backward compatible in MAX 10 FPGA chip ?

Need to replace Max 5 CPLD with MAX 10 FPGA in my board.

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3 Replies
Abe
Valued Contributor II
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As long as the design is written in VHDL/Verilog and do not use any MaxV specific IP, the code will work on Max10 FPGA. If you've used and MaxV Specific IP, you will have to upgrade them to the same or compatible IPs in Max10 .

 

 

a_x_h_75
New Contributor III
22 Views

However, MAX 10 devices are not pin-for-pin compatible with MAX V devices.

 

Cheers,

Alex

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Hi Swapnil,

 

To maintain the highest possible performance and reliability. You must also check the operating requirements described for both MaxV and Max10 devices.

Kindly refer below link for more information.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-10/m10_datasheet.pdf - Max10 Operating Conditions (Page 4) 

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-v/max5_handbook.pdf  - MaxV Operating Conditions (Page 49)

 

Thank you.