- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
I have a customized design which I have routed a NVRAM to SPI pin of HPS side.
Now the software team wants to access NVRAM like a flash. So I'm thinking to use generic flash controller ip core in FPGA to control it. I know it's possible to loan pins from HPS to FPGA.
The issue here is :
The generated conduit signals supposed to connect to FPGA are only unidirectional, see
._hps_io_gpio_inst_LOANIOXX Bi-direction to top level pin assignment
._h2f_loan_io_in Out to FPGA logic
._h2f_loan_io_out In to FPGA logic
._h2f_loan_io_oe In to FPGA logic
But the generic flash control ip has bidirectional IO for data transfer. It seems I can not connect them together. Is there any solution for this? If not, then I have to redesign the board to use FPGA pin instead.
Thank you very much for your time.
Any response/reply is appreciated.
Mingyuexin
Link Copied
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
May I know the Quartus version you are working with?
Also, which board are you referring to? Is It Cyclone V SoC, Arria 10 SoC etc
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Thank you very much for the response.
I'm working with Quartus Prime standard 18.1.
My board is Cyclone V SOC.
Thank you very much for your time.
Best regards
Mingyuexin
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
Do you have any solution or suggestions on this?
With best wishes
Mingyuexin
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
Accord to our Cyclone V SoC Device Design Guidelines, the recommend peripherals that the HPS dedicated IO with loaner are: QSPI, NANDx8,eMMC, SD/MMC, UART,USB, EMAC
NVRAM is not entirely supported. But you may check our video tutorial on how to initiate the example of HPS loaner IO using Qsys/Platform Designer here:
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
I have a question. For Arria10 devices, I don't see the LOANIO option, and my quartus version is 18.1
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Sorry I have never used Arria 10, I do not know.
Best regards
Mingyuexin
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi Mingyuexin,
Want to ask this question, have you found the answer? I also want to know this part.
Thank you.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Sorry to see your question this late.
We redesigned the hardware to use FPGA fabric to communicate with the flash.
With best wishes
Mingyuexin
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page