JIC programming process shows successful, but the FPGA Configuration Sequence looks abnormal.

[CTu001]

Debug information:

device: 5CEFA4M13I7N

MSEL[4:0] setting: 10011

related signal observation:

• nSTATUS is high
• nCONFIG toggled repeatedly
• CONF_DONE is low

By the way, what is the difference between 5CEFA4M13I7N and 5CEFA4M13C8N? In our previous design which used 5CEFA4M13C8N is without this problem.

[YuanLi_S_Intel]

Hi Chien Hui, The differences between 5CEFA4M13I7N and 5CEFA4M13C8N are the Operating Temperature and FPGA Fabric Speed Grade. You may refer to link below for more information about it: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-v/cv_51001.pdf (Page 6) The signal is weird. So, can the device be configured when the board is boot up? Regards, YL

[CTu001]

Hi SooYL,

There are TYPOs:

"""""

related signal observation:

• nSTATUS nCONFIG is high
• nCONFIG nSTATUS toggled repeatedly
• CONF_DONE is low

"""""

The device is not configured well after JIC programming and reboot.

By the way, SOF programming is fine.

We have done some testing, please find more detail in the attached file.

thanks!

[YuanLi_S_Intel]

Hi Chien-Hui Tu, nSTATUS is toggling, that means the configuration is not successful. Can you try to change the MSEL to 10010? Also, can you check if AS mode is selected in the Quartus Design? Regards, YL

[YuanLi_S_Intel]

Hi Chien-Hui Tu, Just would like to check if changing the MSEL to AS mode will resolve your issue? Regards, YL