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Altera_Forum
Honored Contributor I
1,006 Views

LVDS Signal DC offset and AC Swing

Hi, What is the value of LVDS DC offset and LVDS AC Swing of Cyclone 10 GX devices?

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16 Replies
Altera_Forum
Honored Contributor I
133 Views

1. It's all in the datasheet. 

2. Which pins are you asking about, GPIO or transceiver output? Transceiver don't provide LVDS standard for DC coupled links.
Altera_Forum
Honored Contributor I
133 Views

"High Speed Differential I/O is the dedicated I/O standard for the transmitter in Intel Cyclone 10 GX transceivers"

Altera_Forum
Honored Contributor I
133 Views

 

--- Quote Start ---  

"High Speed Differential I/O is the dedicated I/O standard for the transmitter in Intel Cyclone 10 GX transceivers" 

--- Quote End ---  

 

 

 

 

I found in earlier documents that LVDS is specified from 1.0V to 1.4V . 0.3V Voltage Swing and Center 1.25V with Clear figures. I assume that same values are same for Cyclone 10 GX and newer devices. I couldn't find the values described like this in Cyclone 10 GX documentation.
Altera_Forum
Honored Contributor I
133 Views

For example, at Cyclone 10 GX datasheet ( https://www.altera.com/en_us/pdfs/literature/hb/cyclone-10/c10gx-51002.pdf ) page 19, VCM is defined as 1.25 V and Minimum Voltage swing is defined 200 mV ( 2*VID = 2 * 100 ) . There is no Max value is defined. For the data rates below 700 Mbps Swing from 0 to 1.85V, For data rates above 700 Mbps , Swing from 1,0 V to 1.6V ( For optimized LVDS receiver performance, the receiver voltage input range must be within 1.0 V to 1.6 V for data rates above 700 

Mbps and 0 V to 1.85 V for data rates below 700 Mbps. ) is this correct? Am I missing something?
Altera_Forum
Honored Contributor I
133 Views

LVDS outputs in GPIO banks are compatible with industry standard (Vocm 1.25V, 0.3 to 0.4V differential swing).

Altera_Forum
Honored Contributor I
133 Views

 

--- Quote Start ---  

LVDS outputs in GPIO banks are compatible with industry standard (Vocm 1.25V, 0.3 to 0.4V differential swing). 

--- Quote End ---  

 

 

 

is there any limitation in the cyclone 1o gx transceiver to create lvds signal defined as vocm 1.25 v , 0.3v to 0.4v differential swing with 2.5 gbps (1.25 ghz clock) by using the external shared clock with minimum 5 transceivers for source synchronous implementation ( 1 clock 4 data late at 2.5 gbps data rate with 1.25 ghz )?
Altera_Forum
Honored Contributor I
133 Views

It's confusing that you are switching between the GPIO (post# 5) and transceiver (post# 7) output specification. As stated, they are different, they have separate paragraphs in the datasheet. 

 

If your link uses a DC balanced coding like 8b/10b, AC coupling can easily shift the transceiver output to LVDS Vocm.
Altera_Forum
Honored Contributor I
133 Views

Hi,  

 

1- in order to eliminate confusing, I tried to create a new thread with the new question. 

2- The reason to switch Transceiver, because of necessity. LVDS IO Block performance is limited by 1.434 Gbps. I need 2.5 Gbps. 

3- I found the following document: It is for Cyclone 5 not for Cyclone 10. I just tried to figure out the capaility of transceiver. I am hoping this is same as Cyclone 10 GX 

https://www.altera.co.jp/content/dam/altera-www/global/ja_jp/pdfs/literature/hb/cyclone-v/cv_55002.p...  

 

Sounds like, the following section of the document says that Vocm is programmable with Transceiver. Am I missing something? 

 

In table 2-2,  

 

A- Please check the second section called "Save Board Space and Cost" 

B- From there, please see " On-Chip Biasing " 

C- At this section, the comment says " Establishes the required transmitter common-mode voltage (TX VCM) level at the transmitter output. The circuitry is available only if you enable OCT. When you disable OCT, you must implement off-chip biasing circuitry to establish the required TX VCM level. " 

 

 

Does this mean that Vcm is programmable? Am I missing something?
Altera_Forum
Honored Contributor I
133 Views

Why do you refer to Cyclone V GX instead of Cyclone 10 GX documents? The relevant are the transceiver PHY user guide https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/cyclone-10/ug_cyclone1... and the datasheet https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/cyclone-10/c10gx-51002... 

 

However neither C5GX nor C10GX have programmable transceiver Vocm level. Datasheet specifies 0.65 V for C5GX and 0.4/0.5 V for C10GX. Setting transceiver Vocm to 1.25 V LVDS value is simply impossible due to the low transceiver supply voltage. 

 

You didn't yet answer the question about AC coupling option. What's your application?
Altera_Forum
Honored Contributor I
133 Views

 

--- Quote Start ---  

Why do you refer to Cyclone V GX instead of Cyclone 10 GX documents? The relevant are the transceiver PHY user guide https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/cyclone-10/ug_cyclone1... and the datasheet https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/cyclone-10/c10gx-51002... 

 

However neither C5GX nor C10GX have programmable transceiver Vocm level. Datasheet specifies 0.65 V for C5GX and 0.4/0.5 V for C10GX. Setting transceiver Vocm to 1.25 V LVDS value is simply impossible due to the low transceiver supply voltage. 

 

You didn't yet answer the question about AC coupling option. What's your application? 

--- Quote End ---  

 

 

 

A- This is an application of MIPI D-PHY: The physical layer is explained at the following document at page 14 under the slide title called " MIPI D-PHY at the Physical Layer " 

https://www.keysight.com/upload/cmc_upload/all/electrical-protocol-and-application-layer-validation-... 

 

This is an interface between FPGA(Cyclone 10 GX) and Video Processor ( Intel Movidius ) by using Intel/Altera IP vendor's IP ( Nortwest Logic) 

 

 

B- In order to meet the physical layer requirements. We are using the following IC from Meticom 

http://meticom.com/page2/page17/page19/appexamp01.html 

 

 

Please see the right section of the figure: Meticom MC20902 IC is used between FPGA source and Video Processor MIPI D-PHY Sink 

 

 

C- Problem: Cyclone 10 GX devices LVDS lines are limited by 1.434 Gbps 

 

D- Solution: Cyclone 10 GX devices Transceiver lanes will be used to meet the data rate 2.5 Gbps ( DDR rate, it means clock speed will be half = 1.25 Ghz ) 

 

E- Transceiver capability for DC offset (Vocm) and AC Swing ( from 0.2V to 0.4V peak to peak) is the key  

 

 

QUESTION: What is the capability of Cyclone 10 GX transceivers to adjust Vocm and AC Swing? 

 

MY UNDERSTANDING from the discussion above is that we don't have any control on both of Vocm and AC Swing. is this right?
Altera_Forum
Honored Contributor I
133 Views

 

--- Quote Start ---  

Why do you refer to Cyclone V GX instead of Cyclone 10 GX documents? The relevant are the transceiver PHY user guide https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/cyclone-10/ug_cyclone1... and the datasheet https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/cyclone-10/c10gx-51002... 

 

However neither C5GX nor C10GX have programmable transceiver Vocm level. Datasheet specifies 0.65 V for C5GX and 0.4/0.5 V for C10GX. Setting transceiver Vocm to 1.25 V LVDS value is simply impossible due to the low transceiver supply voltage. 

 

You didn't yet answer the question about AC coupling option. What's your application? 

--- Quote End ---  

 

 

 

Hi, which table did you use to get Vocm 0.4/0.5V for C10GX in C10GX Datasheet? Table 17 in the transceiver PHY user guide https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/cyclone-10/ug_cyclone1... says that "Output Swing Level (VOD) 0-31 " based on VCCT. If VCCT is 1.0V and if I pick "Output Swing Level (VOD)" as 200 mV, is Vocm still around 0.4V/0.5V or will it be around 100 mV ( mid range of 200 mV ) ? Fifure 166 Transmit buffer in the transceiver PHY user guide https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/cyclone-10/ug_cyclone1... shows VCM for TX. Where is this value coming from?
Altera_Forum
Honored Contributor I
133 Views

 

--- Quote Start ---  

Hi, which table did you use to get Vocm 0.4/0.5V for C10GX in C10GX Datasheet? Table 17 in the transceiver PHY user guide https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/cyclone-10/ug_cyclone1... says that "Output Swing Level (VOD) 0-31 " based on VCCT. If VCCT is 1.0V and if I pick "Output Swing Level (VOD)" as 200 mV, is Vocm still around 0.4V/0.5V or will it be around 100 mV ( mid range of 200 mV ) ? Fifure 166 Transmit buffer in the transceiver PHY user guide https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/cyclone-10/ug_cyclone1... shows VCM for TX. Where is this value coming from? 

--- Quote End ---  

 

 

In addition to the questions above, if Vocm is still 0.4V/0.5V regardless of "Output Swing Level (VOD)", can I change VCCT as 0.5V ( Altera documentation provides options with 0.85V, 0.95V, 1V) or VCCT as 2.V. My objective is to change Vocm into an acceptable range by changing VCCT if there is no option of programming Vocm. "Output Swing Level (VOD)" 200mV is acceptable for my application. For Vocm, I have two options: First option: If I can reduce Vocm between 100 and 200 mV by changing VCCT around 0.5V , it will be good enough. Or Second option: If I can increase Vocm around 1V by changing VCCT as 2V.  

 

 

Please see my last two posts: 

 

Question 1: is there any relationship between "Output Swing Level (VOD) 0-31 " and Vocm? if VOD is 200 mV or 500 mV, do I still have the same Vocm? 

 

Question 2: If I have the same Vocm regardless of VOD value, Can I change the Vocm by changing VCCT voltage value by decreasing or increasing? is there any limitation in terms of minimum or maximum level for VCCT?
Altera_Forum
Honored Contributor I
133 Views

Quite clearly the 0.4/0.5 Vocm spec is quoted from c10gx datasheet. You have been previously asking about transceiver ability to connect with LVDS IO standard. As far as I see, MIPI D isn't using LVDS levels. 

 

My brief reading of the transceiver spec tells that it supports two VCCT levels, resulting in the said Vocm values, but I didn't analyse it in detail. I however doubt that varying VCCT beyond the specified levels is a good idea. If you need to adjust Vocm for a DC coupled link, you better think about resistor networks. In a first place I would check if the involved peer can work with the signal level exposed by the transceiver.
Altera_Forum
Honored Contributor I
133 Views

 

--- Quote Start ---  

Quite clearly the 0.4/0.5 Vocm spec is quoted from c10gx datasheet. You have been previously asking about transceiver ability to connect with LVDS IO standard. As far as I see, MIPI D isn't using LVDS levels. 

 

My brief reading of the transceiver spec tells that it supports two VCCT levels, resulting in the said Vocm values, but I didn't analyse it in detail. I however doubt that varying VCCT beyond the specified levels is a good idea. If you need to adjust Vocm for a DC coupled link, you better think about resistor networks. In a first place I would check if the involved peer can work with the signal level exposed by the transceiver. 

--- Quote End ---  

 

 

I am confused and didn't get the answer my previous two questions: 

 

Question 1: Vocm is 0.4/0.5V 

 

CONFUSED: could you give me table or figure number in Datasheet? This is not clear to me. I couldn't find any section which gives this number for Cyclone 10 GX 

 

Question 2: is there any relationship between "Output Swing Level (VOD) 0-31 " and Vocm? if VOD is 200 mV or 500 mV, do I still have the same Vocm? 

 

CONFUSED: YES??? NO???? 

 

Question 3: If I have the same Vocm regardless of VOD value, Can I change the Vocm by changing VCCT voltage value by decreasing or increasing? is there any limitation in terms of minimum or maximum level for VCCT? 

 

CONFUSED: Where can I find MAXIMUM or MINUMUM values for VCCT? 

 

 

Altera_Forum
Honored Contributor I
133 Views

1. Datasheet table 27. Vocm is 0.45/0.5 rather than 0.4/0.5, my fault. 

2. I read the datasheet so, that Vocm isn't affected by Vod setting. 

3. Datasheet table 4. 

 

In addition, did you notice the absolute maximum receiver input voltage specification of 1.2 V in table 25?
Altera_Forum
Honored Contributor I
133 Views

Are you using MC20902 to drive HS and LP signals on MIPI D interface or is it utilized as HS driver only? In the latter case, it's probably easy to divide the transceiver output down to meet MIPI D 2.0 level specifications. MC20902 LVDS input is specified with minimal Vocm of 700 mV, outside the transceiver range. The necessary level shift can be possibly achieved with a resistor network. 

 

I presume that you don't use the MIPI D 8b/10b coding option, so AC coupling isn't possible.
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