Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
Announcements
Need Forum Guidance? Click here

Search our FPGA Knowledge Articles here.
19188 Discussions

LVPECL clock input on MAX10

MRigh
Beginner
1,184 Views

Hello,

we are designing a board based on a MAX 10 device and we would like to use the LVPECL standard at 100MHz to clock the device. Since the MAX 10 evaluation kits does not use this standard to provide the clock to the device, we wondered if anyone has ever tried this kind of input for the clock on the MAX 10, just to have a comparison term.

Many thanks.

0 Kudos
1 Reply
a_x_h_75
New Contributor III
139 Views

I've certainly used differential clock sources into MAX 10, although not particularly LVPECL. The device supports it. I'd be quite comfortable using a LVPECL clock source with a MAX 10. It certainly supports it.

 

Are you concerned about the frequency? Use Quartus to confirm your design but the device itself will quite happily run at 100MHz and higher.

 

Cheers,

Alex

Reply