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Latency of rdreq to q[] in DCFIFO

Andrey_P
Employee
170 Views

In the FIFO User guide I see the following in Table 7:

Output latency of rdreq to q[] : 1 rdlck.

At the same time, on Figure 3 ( Functional Timing for the rdreq Signal and the rdempty Signal
), I see that data on q[] appears on the same rdclk that samples asserted rdreq, i.e. the latency between rdreq and q[] is 0 rdclk (see the screenshot below)

 

Andrey_P_0-1635779852953.png

 

 

So the question is: what is wrong - the spec value or the timing diagram?

The simulation results with Agilex are consistent with the Figure 3, so perhaps the spec should be corrected?

 

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SyafieqS
Moderator
122 Views

Andrey,


Thanks for you input. This probably related to documentation spec bug which I will file for fix. Seem there is discrepancy between spec and diagram 3.


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2 Replies
SyafieqS
Moderator
123 Views

Andrey,


Thanks for you input. This probably related to documentation spec bug which I will file for fix. Seem there is discrepancy between spec and diagram 3.


Andrey_P
Employee
115 Views
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