Logic Element (LE) is a chunk of programmable logic inside an FPGA, typically containing one or more lookup tables and flip-flops (Logic Array Block). Each Logic Array Block (LAB) contains between 8 and 20 identical logic elements, depending on the device family.
The Adaptive Logic Module (ALM) is the basic building block of supported device families. It is designed to maximize performance and resource usage. Each ALM can support up to eight inputs and eight outputs, contains two or four register logic cells and two combinational logic cells, two dedicated full adders, a carry chain, a register chain, and a 64-bit LUT mask.