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Altera_Forum
Honored Contributor I
1,132 Views

MAX 10, using LVDS differential clock input.

Is it available that MAX 10 uses LVDS clocks? 

I should use DSC1103 as an input clock. 

So I tried to use ALTPLL, but only one input clock is available not CLKp and CLKn. 

Are there any methods using LVDS clocks with MAX 10 device?? 

Please, help me! 

 

 

 

 

DSC1103(http://ww1.microchip.com/downloads/en/devicedoc/dsc1103_dsc1123_datasheet.pdf)
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2 Replies
Altera_Forum
Honored Contributor I
80 Views

You can use the ALTPLL. However, it is not in the IP configuration that you specify that you want LVDS. 

 

In the 'Pin Planner' you will need to find your input clock signal and specify that it is an LVDS signal. Doing so will automatically add a second pin, the complimentary half of the signal you've selected, giving you CLKp & CLKn. 

 

Cheers, 

Alex
Altera_Forum
Honored Contributor I
80 Views

A LVDS input is represented by one interface signal, you select only the p pin of a differential pair in the pin planner or assignment editor and get the n pin selected automatically.

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