Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
Announcements
Need Forum Guidance? Click here

Search our FPGA Knowledge Articles here.

MAX+plus II error

PauloGoulart
Beginner
191 Views

programming EPM7064lc44 with MAX plus, get an error if change the device to EPM7064SLC44.

Error Message:  Logic Array Block A requires too many I/O pins as a result of user assignments.

OK to Ignore,  Chips/Pins/LCs, then it compiles. any ideas why MAX7000 and MAX7000S are so different?

 

0 Kudos
2 Replies
MBenca
New Contributor I
173 Views

Hi Paulo,
EPM7064 and EPM7064S devices have the same gates count, macrocells count, maximum user I/O pins and device pinout. But there is JTAG interface available for MAX 7000S only. When the JTAG interface in MAX 7000S devices is used for in-system programming, four I/O pins become JTAG pins. What is the JTAG interface settings in MAX+PLUS II?

Regards,
Martin

Nurina
Employee
148 Views

Hi,

Did the above reply help?


Reply