Hi,May i know how to trigger reconfiguration remotely in a MAX10 device. According to the document 'Remote System Upgrade for MAX 10 FPGA Devices over UART with the Nios II Processor', page no. 6 , two steps are mentioned: 1.Write 0x03 to the offset address of 0x01 in the Dual Configuration IP core. This operation overwrites the physical CONFIG_SEL pin and sets Image 1 as the next boot configuration image. 2.Write 0x01 to the offset address of 0x00 in the Dual Configuration IP core. This operation triggers reconfiguration to application image in CFM1 and CFM2. But if i read the Busy signal (bit 0 of offset address of 0x03) , after step 1 , it continues to be high until power off. Can i go to step 2 immediately, after step 1 , or is it compulsory to wait until the busy pin goes LOW? Thanks in advance.
Hi,I followed the same guide and managed to get it working. You need to wait unti IP gets busy and becomes idle again. However, I did this with just a usleep(1) command between step 1 and 2.