MAX10 : Error (169049): Enable Bus-Hold Circuitry and Weak Pull-Up Resistor logic

Programmable Devices

CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

MAX10 : Error (169049): Enable Bus-Hold Circuitry and Weak Pull-Up Resistor logic

1,053 Views

Error (169049): Enable Bus-Hold Circuitry and Weak Pull-Up Resistor logic options cannot both be enabled for ~ALTERA_TMS~ pin

Error (169049): Enable Bus-Hold Circuitry and Weak Pull-Up Resistor logic options cannot both be enabled for ~ALTERA_TDI~ pin

Using Altera MAX10 Dev Kit

10M08SAE144C8G

Quartus Prime Lite 16.0.0

Edit Settings

Compiler Settings

Advanced Fitter Settings

Enable Bus-Hold Circuitry = ON

MAX10 TMS and TDI have on IC weak pull ups - so the SW thinks there is a problem with TMS and TDI.

Weak pull-ups ARE NOT turned on.

Any ideas on this?

My goal is to get bus-hold enabled on the MAX10 pins during user mode.

Link Copied

0 Replies

Community support is provided during standard business hours (Monday to Friday 7AM - 5PM PST). Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.