MAX10 Input PLL clock Rise Time/Fall Time requirment. - Intel Community

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MAX10 Input PLL clock Rise Time/Fall Time requirment.

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Hi

I am Using 10M08SCM153I7G.

What is the Rise Time / Fall Time requirement of the Input clock to max10.

Consider i am connecting external clock (50MHz - Oscillator) to CLK0P/DIFFIO_RX_L18P pin of max10

Regards

Prashanth Kumar G N

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Rise fall time is does not affect PLL functionality. There is no requirement for rise fall time.

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