MAX10 Input PLL clock Rise Time/Fall Time requirment.

[PG_N]

Hi 

I am Using 10M08SCM153I7G.

What is the Rise Time / Fall Time requirement of the Input clock to max10.

Consider i am connecting external clock (50MHz - Oscillator) to CLK0P/DIFFIO_RX_L18P pin of max10 

Regards

Prashanth Kumar G N

[JonWay_C_Intel]

Hi @PG N​ 

Rise fall time is does not affect PLL functionality. There is no requirement for rise fall time.