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MAX10 PLL with spread spectrum input

Ty38
Novice
277 Views

Hello,
I plan to use MAX10 FPGA PLLs, with Microchip a 25MHz DSC63xxB mems oscillator with spread spectrum feature.

I would like to know is MAX10 PLLs are able to lock on spreadspectrum modulation frequency about 33KHz. I understand that it depend of PLL Bandwidth setting.

The only information I found in UG-M10CLKPLL | 2018.06.15 is about bandwitdh Low/medium/High. 
Is there some information about bandwitdh value with different setting? 

Thanks

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5 Replies
Farabi
Employee
257 Views

Hi, 

I am Farabi who will support you on this request. 

Max10 devices can't detect if the input clock is spread spectrum clock or not. It will detect the spread spectrum input clock as jittery clock input. I attached Max10 datasheet and at page 27, there is spec mention about acceptable input clock jitter. Typically, Max10 required a clean input clock with maximum peak-to-peak clock jitter of 200ps. 

If you using 33khz spread spectrum input clock, I am afraid the jitter is too large and Max10 PLL can't detect the input clock signal you feed. 

 

regards,
Farabi 

Ty38
Novice
230 Views

Hello Farabi,
I understand your answer.
I've forget to precise that frequency deviation is about +-250ppm centered, and also frequency modulation about 33KHz.

In my point of vue, 33KHz is more a wander than a jitter, because of low speed of triangle modulation at 33Khz.

Am I wrong?
Did you experience some customer such a DSC63XXB with MAX10 family?

Thanks for your reply,

best regards,

Thierry

Farabi
Employee
215 Views

Hi Thierry, 

 

Max10 link : https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-10/m10_datasheet.pdf

pls refer to page 27, fINclk input jitter must be below +/- 750ps. 

DSC63xxB has 250ppm which converted to ps ~ around 20us = 20000ps. 

 

hope this helps.

 

regards,
Farabi 

Farabi
Employee
214 Views

Hi Thierry, 

 

I am sorry, my calculation previously was wrong. 

If 25MHz input clock with 250ppm jitter, that means is has around ~20ps jitter which meeting MAX10 input clock. 

Meaning you can use DSC63xxB for input clock osc. 

 

sorry for the confusion. 

 

regards,

Farabi 

Farabi
Employee
241 Views

Hi, 

 

We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

 

regards,

Farabi

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