Hi everyone,
After upgraded to Quartus Prime, I have a strange error when compiling the onchip_flash ip module:
Warning (332060): Node: altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|read_state.READ_STATE_SETUP was determined to be a clock but was found without an associated clock assignment.
--> Info (13166): Register altera_onchip_flash:onchip_flash_0|altera_onchip_flash_block:altera_onchip_flash_block|ufm_block~XE_YE_TO_SE_FF is being clocked by altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|read_state.READ_STATE_SETUP
It seems that one signal from the internal state machine of the onchip_flash module is considered as a clock, I have tried with different projects, tried to define a clock on this signal based on the internal osc of the onchip_flash (it says then that there are no path between them), tried to change the settings regarding state machine, but no success!
if Someone have an idea I would really appreciate!
It's just a warning but then the timing requirements are not met, Fmax is arround 7MHz instead of 100MHz withtout the onchip_flash module!
Many Thanks,
