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Good day,
I am currently developing a small application with MAX7000S CPLD. I would need to enable dedicated GCLRn pin to clear all design registers but cannot find how to do this. cheers CarloLink Copied
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The global options to do this appear to have been removed from the newest version of Quartus that supports the MAX7000 family. I was convinced I knew where they were - until I looked for them. I'm pretty sure they used to exist in older versions of Quartus for MAX7000 - these options still exist for MAX 10 under the 'General' tab of 'Device and Pin Options'.
However, all is not lost. Providing your code resets all, yes all, the registers in your design to zero (from a single, asynchronous signal), then Quartus will (should) pick up on this and assign this reset signal to the Global Clear pin of the device. I did successfully try this for myself. I acknowledge that this doesn't categorically confirm the dedicated global clear circuitry is being put to use - the MAX7000 macrocell could, a little wastefully, implement this clear in another way via the LAB local routing. However, I suspect Quartus is up to the job and will pick up on your intended functionality, which may be why the options have been remove from Quartus. Cheers, Alex- Mark as New
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Thank you much Alex,
I am not pretty sure, but I believe my design's clear signal was not one of those I had to manually force using pin planner but I found it in the "correct" pin right away after first compilation. I undesrtand compilers are getting more and more smart and automated we just have to seat back and relax trusting what they do. Again thank you so much for clarifying this. Cheers Carlo
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