Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
Announcements
Need Forum Guidance? Click here

Search our FPGA Knowledge Articles here.
19102 Discussions

Max 10 FBGA (10M40DAF484C8G) Package tolerance

Madhura
Employee
304 Views

I am using Max 10 device 10M40DAF484C8G in my design. It is a 484-Pin FineLine Ball-Grid Array (FBGA) - Wire Bond. In the package Information the tolerance for body dimension is not provided for footprint creation (for assembly tolerance). How and where to get the information?

Madhura_0-1598332317805.pngMadhura_1-1598332350818.png

Thanks,

Madhura

0 Kudos
2 Replies
ChiaLing_T_Intel
Employee
284 Views

Hi Madhura,

 

Thank you for contacting Intel Community. Sorry to let you know that Intel FPGA do not provide support for PCB footprint symbols for FPGA and CPLD device families, similar to configuration devices.

 

However, we will continue the support by providing the schematic symbol which you can download from the link above. You could have the schematic symbol in .olb format from the link below:

https://www.intel.com/content/www/us/en/programmable/support/support-resources/download/board-layout...

 

Thank you

 

Regards,

Chia Ling


MBenca
New Contributor I
277 Views

Hi Madhura,
I assume the question is about the BSC meaning in case of a package outline dimension and not connected with a PCB footprint symbol library.

BSC means basic spacing between centers. For further information I would recommend to check to the following web pages:

- https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/soluti...
- https://www.xilinx.com/support/answers/8393.html

Regards,
Martin

Reply