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Altera_Forum
Honored Contributor I
909 Views

Memory SRAM/FLASH in DE1 Altera setting address problems

Good day... 

I'm new in forum and i didn't find any post related to my problem... 

 

I'm trying write and read the external memory (SRAM or Flash whathever) in DE-1, using VHDL. 

 

IDE: Quartus 13.0 

 

My problem is the memory address isn't changing, and doesn't matter any of Output/Write/Chip Enable flag, the memory state is 'locked'.(write/read still 'working' even if chip is disabled) 

 

Code in the attachment
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Altera_Forum
Honored Contributor I
77 Views

Well... 

i found the error in the code, is working and i uploaded the project in my github repository. 

 

https://github.com/ctrigger/fpga-altera-vhdl 

 

the code is commented, so if any others get the same problem or similar i hope this example solve it.
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