My FPGA design looking for new home.. Altera FPGA?

[Altera_Forum]

Hi guys. I have a couple different questions regarding Altera FPGA and environment. 

  So I am looking for the easiest path to moving a design presently running on Spartan3AN, into another FPGA of equal or greater capabilities.   1) The FPGA design is very simple, and could be implemented on just about any FPGA with enough power, so my choice is going to be largely on the level of technical support available - what's available from Altera in terms of regular subscription, or Altera dev. board level support, or by paid coaching?   The design running on Spartan3AN (@20MHz constraint) is at 70% resources use, and executes within 70% of the available time - the design is an audio DSP with 48KHz. stereo 24bit codec IN/OUT - A main soft processor loop waits for the AD conversion (each 20.8uS), then executes the DSP calculations of input, loads the DA register with output, waits for next AD conversion.  2) The DSP function is also pretty straight forward, but the design accepts an external 49.152 clock that the design uses to run the codec at 48KHz. Is there a dev. board with such codec onboard? How about FPGA audio project designs with external clocking? How about for the Max10 series?   The design works perfectly on the 3AN, but I am having some minor issues with flash due to wafer change, ISE patches, and welcome the chance to move to a more contemporary FPGA if there is an easy* path, in particular with respect to the codec (Delta-sigmoid) and driving it at 48Khz. from 49.152 (or other frequency in this range). Eagerly awaiting any and all opinions and comments, advice. Thanks.

[Altera_Forum]

Hi, 

 You may want to look at the Max10 FPGA family as these also come with ADC and can be more than enough to work for your design.   https://www.altera.com/products/fpga/max-series/max-10/overview.html

[Altera_Forum]

--- Quote Start ---  Hi,  You may want to look at the Max10 FPGA family as these also come with ADC and can be more than enough to work for your design.   https://www.altera.com/products/fpga/max-series/max-10/overview.html  --- Quote End ---    Thanks, eapenabrm. I am about to order the Terasic a Max10 NEEK . I am hoping i can modify existing example code to have the Max10 NEEK accept an external master audio clock. Unfortunately, Terasic is out for two weeks, so i'm hoping to find out a little more before i select my solution. -  do you happen to know if i will be able to change audio clock sources without issue, on the max10 neek? i imagine it is straight forward in principle - i'll just need to change the mclk factor from 256x or 512x or... to what i need to obtain codec 48khz. from 49.152mhz. external master clock.   If no one knows i will take a chance that it won't be too difficult, but all comments welcome. If all else fails i could probably modify the evaluation board. Thanks. Cheers,

[Altera_Forum]

The first thing to do, before even considering what hardware to buy, is to download Quartus and try compiling your HDL design with a couple different device families to see what is suitable (e.g. Max, Cyclone).

[Altera_Forum]

--- Quote Start ---  The first thing to do, before even considering what hardware to buy, is to download Quartus and try compiling your HDL design with a couple different device families to see what is suitable (e.g. Max, Cyclone).  --- Quote End ---    Ahh. Great idea, TCWORLD. Thanks.